/**
  ******************************************************************************
  * @file    system_bs32f1xx.c
  * @author  MCU Application Team
  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
  ******************************************************************************
*/
/** @addtogroup CMSIS
  * @{
  */

/** @addtogroup bs32f1xx_system
  * @{
  */

/** @addtogroup BS32F1xx_System_Private_Includes
  * @{
  */
#include "bs32f1xx.h"
/**
  * @}
  */

/** @addtogroup BS32F1xx_System_Private_Defines
  * @{
  */
/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to relocate your vector Table in
     Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET  0x0U /*!< Vector Table base offset field.
                                   This value must be a multiple of 0x100. */
/******************************************************************************/
/**
  * @}
  */

/** @addtogroup BS32F1xx_System_Private_Variables
  * @{
  */
uint32_t SystemCoreClock = PLL_DEFAULT_VALUE;
uint32_t HSEClock = 8000000UL;

const uint32_t AHBPrescTable[8] =  {0U, 1U, 2U, 3U, 2U, 2U, 2U, 2U};
const uint32_t APBPrescTable[8] =  {1U, 1U, 1U, 1U, 1U, 2U, 3U, 4U};
/**
  * @}
  */

/** @addtogroup BS32F1xx_System_Private_Functions
  * @{
  */  

/**
  * @brief  Setup the microcontroller system.
  * @param  None
  * @retval None
  */
void SystemInit(void)
{
  /* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
  SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
#endif

  /* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}

/**
  * @brief  Update SystemCoreClock variable according to Clock Register Values.
  *         The SystemCoreClock variable contains the core clock (HCLK), it can
  *         be used by the user application to setup the SysTick timer or configure
  *         other parameters.
  * @param  None
  * @retval None
  */
void SystemCoreClockUpdate(void)
{	
  /* HCLK clock frequency */
	uint32_t frequency;	
	
	__IO uint32_t *pReg = ((__IO uint32_t *)PLL_CLOCK_BASE);
	
	if(READ_BIT(*pReg, PLL_SEL_POS_2) == (PLL_SEL_POS_2))
	{
		 frequency = 72000000UL;
	}
	else
	{
		 if(READ_BIT(*pReg, PLL_SEL_POS_1) == (PLL_SEL_POS_1))
		 {
			  frequency = 48000000UL;
		 }
		 else
		 {
			  frequency = 64000000UL;
		 }			 
		 
	}	
	
  SystemCoreClock = frequency>> AHBPrescTable[(RCC->CR & RCC_CR_HPRE)];	
   
}

/**
  * @}
  */

/**
  * @}
  */

/**
  * @}
  */
/************************ (C) COPYRIGHT BSMicroelectronics *****END OF FILE****/
